Status Register
| CMDRDY | Command Ready (cleared by writing in HSMCI_CMDR) |
| RXRDY | Receiver Ready (cleared by reading HSMCI_RDR) |
| TXRDY | Transmit Ready (cleared by writing in HSMCI_TDR) |
| BLKE | Data Block Ended (cleared on read) |
| DTIP | Data Transfer in Progress (cleared at the end of CRC16 calculation) |
| NOTBUSY | HSMCI Not Busy |
| SDIOIRQA | SDIO Interrupt for Slot A (cleared on read) |
| SDIOWAIT | SDIO Read Wait Operation Status |
| CSRCV | CE-ATA Completion Signal Received (cleared on read) |
| RINDE | Response Index Error (cleared by writing in HSMCI_CMDR) |
| RDIRE | Response Direction Error (cleared by writing in HSMCI_CMDR) |
| RCRCE | Response CRC Error (cleared by writing in HSMCI_CMDR) |
| RENDE | Response End Bit Error (cleared by writing in HSMCI_CMDR) |
| RTOE | Response Time-out Error (cleared by writing in HSMCI_CMDR) |
| DCRCE | Data CRC Error (cleared on read) |
| DTOE | Data Time-out Error (cleared on read) |
| CSTOE | Completion Signal Time-out Error (cleared on read) |
| BLKOVRE | DMA Block Overrun Error (cleared on read) |
| FIFOEMPTY | FIFO empty flag |
| XFRDONE | Transfer Done flag |
| ACKRCV | Boot Operation Acknowledge Received (cleared on read) |
| ACKRCVE | Boot Operation Acknowledge Error (cleared on read) |
| OVRE | Overrun (if FERRCTRL = 1, cleared by writing in HSMCI_CMDR or cleared on read if FERRCTRL = 0) |
| UNRE | Underrun (if FERRCTRL = 1, cleared by writing in HSMCI_CMDR or cleared on read if FERRCTRL = 0) |